How to program 2-to-4 line Decoder in verilog?
A Decoder is a simple logic gates diagram that changes a code into a set of different signals. Decoder is the reverse process of Encoders.
A simple/common decoder is the line decoder which takes an n-digit binary number and decodes it into 2n data lines. The simplest decoder is the 1-to-2 line decoder. Following is the truth table of 1-to-2 line decoder,
Following is the truth table of 2-to-4 line decoder ;
A Decoder is a simple logic gates diagram that changes a code into a set of different signals. Decoder is the reverse process of Encoders.
A simple/common decoder is the line decoder which takes an n-digit binary number and decodes it into 2n data lines. The simplest decoder is the 1-to-2 line decoder. Following is the truth table of 1-to-2 line decoder,
Following is the truth table of 2-to-4 line decoder ;
when it developed into a logic circuit it looks like
Verilog code of 2 to 4 line decoder:
module decoder(d,A0,A1);
output [3:0] d;
input x,y;
assign d[0] = ~A0 & ~A1 ;
assign d[1] = A0 & ~A1;
assign d[2] = ~A0 & A1;
assign d[3] = A0 & A1 ;
endmodule
fpga verilog code example
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